Testability of VLSI

Analog Testing Difficulties, Modeling Problems, Simulation Error, Tester Measurement Error, For mixed-signal chips, Test Accessibility Problems, Information Flow, Catastrophic or Hard faults, Parametric or soft faults, Analog Fault Models, multiple parametric faults, Levels of Abstraction, Types of Analog Testing, 1. Specifications based Testing, 2. Structural fault-model based Testing, DC fault simulation of non-linear circuits, AC fault simulation of linear circuits, Transient or time-domain fault simulation, Complementary Pivot Method, ONE-STEP RELAXATION VIA HOUSEHOLDER'S FORMULA, Legato Reliability Solution for Analog Defects, PrimeSim Custom Fault, Monte-Carlo Simulation, TPG Using Sensitivities,Differential sensitivity, Incremental sensitivity, Bipartite graph of this incremental sensitivity matrix, Test Method, Specification Oriented Test, Waveform Oriented Test, DSP-Based Mixed-Signal Test, Scan-in/Scan-out, BIST for Analog Circuits, Oscillation-based test architecture, Loop-back test for RF transceivers, BIST employing an on-chip test stimulus generator and an on-chip test response analyzer.