VLSI System Specifications, Technical Requirements, Market requirements, and Economic Considerations, Technical Requirements include Size of the IC, the maximum amount of power that can be consumed and the performance and the functionality, VLSI Design Styles, FPGA, Standard Cell or Semi-Custom Design, Full-Custom Design, VLSI Design Flow, Low Power VLSI Architecture, VLSI Architecture Example, Function Delay, Power, Throughput, Gate complexity, Functional Flexibility, Function Expandability
VLSI Architecture
Course Curriculum
- Lecture 1: Introduction to VLSI Architecture55 mins
- Lab 1: Implementation of Majority Circuit in Xilinx ISE26 mins
- Lecture 2: Microprocessor Architecture54 mins
- Lab 2: Implementation of Adders in Xilinx ISE Verilog Data Flow Level Modeling20 mins
- Lecture 3: Computer Arithmetic Algorithms and Implementations53 mins
- Lab 3: Initialization in Verilog using XILINX ISE E17 mins
- Lecture 4: Instruction Set Architecture and MIPS Instructions1 hour 8 mins
- Lab 4: Handling multi-bit data and Concatenation in Verilog24 mins
- Lecture 5: ALU Design and Microprocessor Design46 mins
- Lab 5: Decoder and Full Adder Design using Verilog in Xilinx14 mins
- Lecture 6: Hardware Flow Chart Part-11 hour 8 mins
- Lab 6: Multiplexer Design using Verilog in Xilinx16 mins
- Lecture 7: Hardware Flow Chart-Part-253 mins
- Lab 7: Applications of Decoder, Encoder, and Multiplexer in Xilinx Verilog24 mins
- Lecture 8: Hardware Flowcharts Part-347 mins
- Lab 8: Sequential Circuit Design using Flip-flops in Xilinx16 mins
- Lecture 9: Flowcharts to Datapath Control Design44 mins
- Lecture 10: Timing Signals51 mins
- Lecture 11: Pipelined Architecture1 hour 1 min
Teacher

Sanjay Vidyadharan
Role : Professor
- Website : https://universe.bits-pilani.ac.in/pilani/vidhyadharan/Profile
- Experience : 25 Years
- Specialist in : Electronics and Electrical Engineering
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