VLSI Architecture

Lecture 5: ALU Design and Microprocessor Design

CISC vs. RISC, ALU Design, Microprocessor Design, Example of Instruction Decoding, Steps for executing instruction, Flowchart Method, Flowchart Objectives, The inputs required for the flow chart, Instruction set summary, Execution unit specification, Min Instruction Format, Min Instruction Set

Lesson Intro Video

Lab 4: Handling multi-bit data and Concatenation in Verilog (Prev Lesson)
(Next Lesson) Lab 5: Decoder and Full Adder Design using Verilog in Xilinx
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