VLSI Design

Lecture 12: Dynamic Logic

Limitations of Static CMOS Logic, Static vs. Dynamic Logic, Properties of Dynamic Gate, Speed of Dynamic Logic, Transition Activity, Charge Sharing Phenomenon in Dynamic Logic, Solution to Charge Redistribution, Capacitive Coupling and Backgate (or output-to-input) coupling in Dynamic Logic, Keeper PMOS, Clock-Feedthrough, monotonically rising inputs for Dynamic gates, Problems of Cascading Dynamic Gates.

Lesson Intro Video

Demo on Dynamic Full Adder in LT SPICE Using 180 nm TSMC Files (Prev Lesson)
(Next Lesson) Lecture 13: Domino Logic
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