Microprocessors & Interfaces

Lecture 4: 8086 Architecture, Memory Segmentation, Physical Address generation, Bus Interface Unit

8086 Architecture, Execution Unit (EU), Bus Interface Unit (BIU), Memory Segmentation, Bus Interface Unit (BIU), Dedicated Adder to generate 20-bit address, Physical Address generation, Data Segment Register, Stack Segment Register, Extra Segment Register, Instruction Pointer, EU Registers Accumulator Register (AX), Base Register (BX), Counter Register (CX), Data Register (DX), Stack Pointer (SP) and Base Pointer (BP), Source Index (SI) and Destination Index (DI), Flag Register

Lesson Intro Video

Lecture 3: Overview of 8086 Microprocessor and Explanation of PIN Diagram (Prev Lesson)
(Next Lesson) Lecture 5: 8086 Addressing Modes and OP-Code
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Course Curriculum

Sanjay Vidyadharan
Role : Professor
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