Lesson Archives
TTL to CMOS Level Shifter, CMOS Inverter Switching Threshold, Designing the Receiving Inverter Gate, Non-inverting TTL Level-shifting Circuit, CMOS Level Shifter, Sub-threshold, CMOS Level Shifter, Electrostatic Discharge (ESD), Models for ESD testing, Human Body model, machine model, ESD Protection Network, Protection network with the thick-oxide transistor, Typical ESD failure modes, Input Circuits, Output Circuits, Package […] Limitations of Static CMOS Logic, Static vs. Dynamic Logic, Properties of Dynamic Gate, Speed of Dynamic Logic, Transition Activity, Charge Sharing Phenomenon in Dynamic Logic, Solution to Charge Redistribution, Capacitive Coupling and Backgate (or output-to-input) coupling in Dynamic Logic, Keeper PMOS, Clock-Feedthrough, monotonically rising inputs for Dynamic gates, Problems of Cascading Dynamic Gates. 3 to 8 Decoder, If statement in Verilog, Full adder using to 8 Decoder using Verilog in Xilinx. CISC vs. RISC, ALU Design, Microprocessor Design, Example of Instruction Decoding, Steps for executing instruction, Flowchart Method, Flowchart Objectives, The inputs required for the flow chart, Instruction set summary, Execution unit specification, Min Instruction Format, Min Instruction Set Evolution of Digital Technology, BJT Operation, RTL Logic, DTL Logic, TTL Logic, ECL Logic, Advantages, Disadvantages, MOSFET OPERATION AS SWITCH, NMOSFET AS SWITCH, NMOSFET AS SWITCH, CMOS Inverter, Static CMOS. 4-bit Adder, BCD Adder Instruction Set Architecture, ISA Types, Arithmetic Operation: Addition, subtraction, multiplication, division, and square root Logic Operation: Bitwise logical AND, OR, XOR, and NOT Shift Operation: Logical shift left, Logical shift right, Arithmetic shift right, rotate shift, and rotate shift with carry. Memory Access: Load, Store Input/Output Access: In, Out, Control Transfer: Jumps, Returns, Call subroutines, […] Programmable Logic Array (PLA), Programmable Array Logic Array (PAL), Simple Programmable Logic Device (SPLD), Complex Programmable Logic Device (CPLD), Field Programmable Gate Arrays (FPGAs), Solved Examples of Programming PLA and PAL.