Lesson Archives
Design of Clocked Sequential Circuits, Design of sequence detector 1001, Design of sequence detector overlapping, Design of sequence detector overlapping 1001 with JK Flip-flop Sequential Circuits, Design of Sequential Circuits, 2-bit synchronous counter, State Table, Excitation Tables, Characteristic Table, State Table, JK Flip-flop implementation, State Equations, Design of Clocked Sequential Circuits, D Flip-flop implementation, Design of Mod 3 synchronous counter, Design of Mod 5 Asynchronous counter. JK Flip-flop, Characteristic Table, Edge Triggered JK Flip-Flops, Design J-K Flip-flop using D flip-flop, Characteristic Equation, T Flip-flop, Design of T Flip-flop using JK flip-flop, Edge Triggered T Flip-Flops, Design T Flip-flop using D flip-flop, Models of sequential circuits, Mealy Model, Moore Model, Counter, Asynchronous Counter SR Latch with Enable, D Flip-flop circuit, D Latch with Enable, D Latch with Asynchronous PRESET and CLEAR, Sequential Circuits, Race around in Latches, Flip-Flops, Edge Triggered D Flip-Flops, Master Slave Flip-flop, D-type positive edge triggered flip flops Sequential Circuits, Classification, Synchronous Sequential circuits, Asynchronous Sequential circuits, Latch vs flip-flops, SR Latch Multiplexers, 2:1 Multiplexer, 2:1 MUX, 4:1 Multiplexer – 4:1 MUX, 4:1 Multiplexer – 4:1 MUX Using 2:1 MUX, 4:1 MUX using Tri-state buffers and 2 to 4 Decoder, Boolean Function implementation using Mux, Boolean Function implementation using Multiplexers Decoder, 2 to 4 Line Decoder, 2 to 4 Line Decoder with Enable, 3 to 8 decoder using two 2 to 4 decoders with enable pin, Implementing function using Decoders, Priority Encoder, Binary to Gray Using Encoder-Decoder, Encoder Applications, Decoder Applications Ripple Carry Adder, Carry Look-ahead Adder, 4-bit Adder subtractor with overflow detection, BCD Adder, Binary Multiplier Magnitude Comparator Combinational Circuits, Combinational vs. Sequential Circuits, Half Adder, NAND vs. XOR, Full Adder, Ripple Carry Adder, Carry Look Ahead Adder, Propagation and Generate Static Hazards in Digital Circuits, Dynamic Hazards, Static Glitch, Static Glitch Elimination, Optimization of Multi-Output Digital Circuits, Multi-Output Circuit Optimization, Finding Essential Elements