Digital VLSI

Motivation for  Low Power, ITRS Prediction of Power Consumption, Sources of  Power Dissipation, Static Loss, CMOS Static Power, Short Circuit Loss, Switching Loss, Dynamic Power, Static CMOS Logic, Dynamic Logic, Domino Logic, Pass Transistor Logic, Clock Gating. Multi V_dd Technique, Multi V_th Technique, Architectural & Algorithmic Optimization, Tunnel Field-Effect Transistors, CNFETs Adiabatic Logic,