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Measurement of Power and Delay Analysis of CMOS digital Circuits in Cadence.

56 mins

Digital VLSI

Propagation delay, Static, Short Circuit and Switching power measurement of CMOS Inverter in Cadence Virtuoso

Lesson Intro Video

Importing Stanford University CNFET model into Cadence Virtuoso (Prev Lesson)
(Next Lesson) Importing PTM 7nm, 16 nm, 22nm CMOS Technology files Into Virtuoso Cadence®
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Course Curriculum

Teacher
Sanjay Vidyadharan
Role : Professor
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