Lesson Archives
MUL IMUL DIV IDIV , BCD and ASCII Arithmetic, DAA (decimal adjust after addition), DAS (decimal adjust after subtraction), AAA (ASCII adjust after addition), AAD (ASCII adjust before division), AAM (ASCII adjust after multiplication), AAS (ASCII adjust after subtraction) ADD, ADD Destination, Source, Addition with carry ADC, SUB SUB DESTINATION, SOURCE, SBB, Compare Instruction CMP, Increment INC, Decrement DEC Data Declaration, ASSUME, EQU, ORG, PROC and ENDP, X86 Programming Model, Tiny Small Medium Compact and Large model, Assembler Directives, Storing Data in a Memory Segment, Data Declaration, DB, DW, DD, ASSUME directive, Example for Assume, Equate directive (EQU), The ORG (originate) statement, Procedure (subroutine) PROC and ENDP, PROC FAR, PROC NEAR THREE basic forms of the INS, INSB, INSW, INSD, INS Examples, OUTS 8086 Data Transfer Instructions, Flag Register Data transfer, LAHF : Load AH register from flags, • SAHF : Store AH register in flags, PUSHF : Push flags onto stack, POPF : Pops flags off stack, Control Flags, Directional Flag (D), (STD/CLD), Interrupt Flag (I), (STI/CLI), Trap Flag (T), Additional Data Transfer Instructions (X386 onwards), MOVSX […] Data Transfer Instructions, Segment Override, Input / Output, IN and OUT, Isolated versus Memory-Mapped I/O, LEA, LDS, Address Object data transfer, LEA : Load effective address, LDS : Load pointer using DS, LES : Load pointer using ES, LFS : Load pointer using FS, LGS : Load pointer using GS, LSS : Load pointer using […] 8086 Data Transfer Instructions, MOV, PUSH, POP, XCHG, XLAT, Instructions with two operands, Instructions with one operand, Instructions without any operand, Types of Instructions, MOV destination, source, XCHG destination, source, XLAT, PUSH source, POP destination. IN Reg, Port address, OUT Port address, Reg, LEA 16 bit register, memory. LDS 16 bit register, memory, LES 16 […] Instruction Format, Register Addressing, Immediate Addressing, Little vs Big Endian, Direct Addressing, Register indirect Addressing, Lookup table with register indirect addressing, Lookup table with register indirect addressing, Base plus Indexed Addressing, Register Relative Addressing 8086 MOV Instructions, Register Addressing, Immediate Addressing, Direct Addressing, Register Indirect Addressing, Base-plus-index Addressing, Register Relative Addressing, Base relative -plus-indexed Addressing, Scaled Indexed Addressing. Assembly Language to OP-Code / Machine Language, Data Transfer Instructions, MOV DST, SRC Lecture 4: 8086 Architecture, Memory Segmentation, Physical Address generation, Bus Interface Unit
46 mins
8086 Architecture, Execution Unit (EU), Bus Interface Unit (BIU), Memory Segmentation, Bus Interface Unit (BIU), Dedicated Adder to generate 20-bit address, Physical Address generation, Data Segment Register, Stack Segment Register, Extra Segment Register, Instruction Pointer, EU Registers Accumulator Register (AX), Base Register (BX), Counter Register (CX), Data Register (DX), Stack Pointer (SP) and Base Pointer […]