Lesson Archives
Mixers, Superheterodyne Receiver, Gilbert Mixer, Mixer Design in LT Spice. Low Noise Amplifiers, LNA Design in 45 nm CMOS , Figure of Merits of LNA, AC gain and Noise figure measurement in cadence Virtuoso , S parameter analysis in cadence Virtuoso Input impedance matching of LNA and S11 and S21 of LNA. Low Q of spiral inductors on VLSI Chip, Large silicon area requirement of spiral inductors on VLSI Chip. Design of Active inductors, Simulation of Active Inductors in Cadence Virtuoso. Linear Regulator Design and Simulation in Cadence Virtuoso, Line Regulation, Load Regulation. Temperature dependence , Efficiency measurement. Cascode Circuit, LC Tuned Circuit, MOS CAP, LC Tuneable Amplifier, Simulation of CMOS LC tuned RF circuit is VirtuosoRF Microelectronics: Lecture 1: Tuned Amplifier Total Harmonic Distortion in analog circuits , Causes of THD, and analysis of THD in Cadence Virtuoso Linearity in Analog Circuits, 1 dB Compression Point, Third-order Intercept Point (IP3) , Measurement of 1 dB Compression Point in Cadence Virtuoso, Measurement of Third-order Intercept Point (IP3) in Cadence Virtuoso. Simple Continuous Time Amplifier , Simple continuous time amplifier with Capacitors, Use of feedback switch to define dc input level, Switched-capacitor amplifier, MOSFETS as Switches, Speed Considerations, Precision Considerations, Implementing Capacitors , Switched Capacitance Voltage Doubler, Precision Multiply-by-Two Circuit , LT SPICE simulation of Switched-capacitor amplifier, LT SPICE simulation of Precision Multiply-by-Two Circuit , T […] Decoders, 3 to 8 decoder using two 2 to 4 decoders, 4 to 16 decoder, Implementing function using Decoders, Decoder Applications, Encoders, Priority Encoder, Binary to Gray Using Encoder-Decoder, Encoder Applications. Multiplexers, 2-to-1 multiplexer, 4-to-1 multiplexer, Tri State Buffer, 2:1 MUX using Tri-state buffer, 4:1 MUX using Tri-state buffers and 2 to 4 Decoder, Boolean […]