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VLSI Design Using LT SPICE

Home VLSI Design Using LT SPICE Demonstration 4: D-Latch Design

Demonstration 4: D-Latch Design

12 mins

VLSI Design Using LT SPICE

Lesson Intro Video

Lesson 3: Static CMOS Design (Prev Lesson)

(Next Lesson) Lesson 4: Dynamic and Domino CMOS Design

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Course Curriculum

Lesson 1: Basics of LT SPICE
1 hour 29 mins
Lesson 1: Introduction to CMOS
57 mins
Demonstration 1: Importing TSMC 180 nm CMOS technology file into LT SPICE
16 mins
Demonstration 2: TSMC 180 nm NMOS Characterization Transfer Characteristics & Output Characteristics in LT Spice
Lesson 2: Inverter Design
48 mins
Demonstration 3: VCO Design
9 mins
Lesson 3: Static CMOS Design
29 mins
Demonstration 4: D-Latch Design
12 mins
Lesson 4: Dynamic and Domino CMOS Design
26 mins
Lesson 5: Pass Transistor Logic Design
22 mins
Lesson 6: SRAM Design
29 mins

Teacher

Sanjay Vidyadharan

Role : Professor

Website : https://universe.bits-pilani.ac.in/pilani/vidhyadharan/Profile
Experience : 25 Years
Specialist in : Electronics and Electrical Engineering

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About Me

I was very fortunate to get an opportunity to serve the Indian Airforce for 22 years in various capacities starting as a Senior Technical Engineer in 1994 and retiring as Joint director (Helicopter Maintenance) in 2016. I opted for voluntary retirement from IAF to pursue my passion for academics. I am presently working at BITS-Pilani as Assistant Professor, sharing my experience with young budding engineers.

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